Integration of InGaAs Channel n-MOS Devices on 200mm Si Wafers Using the Aspect-Ratio-Trapping Technique
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چکیده
منابع مشابه
Alloyed junction Ge Esaki diodes on Si substrates realised by aspect ratio trapping technique
A Ge Esaki diode is demonstrated on Si atop a coalesced epitaxial layer of Ge grown through narrow openings in SiO2 that are used to trap threading dislocations from the lattice mismatch. Spin-on doping was used to form the n-type junction and a controlled alloyed reaction of Al and Ge forms the p-type junction. At an alloy temperature of 5808C for 1 s, the Ge-on-Si diodes were found to have a ...
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ژورنال
عنوان ژورنال: ECS Transactions
سال: 2012
ISSN: 1938-6737,1938-5862
DOI: 10.1149/1.3700460